It is well known in the art that it is desirable to estimate the power requirements of an integrated circuit (“IC”) chip, a device, or circuit at the design stage, for example and without limitation, to inform decisions relating to its fabrication. As used herein, and as is readily understood by one of ordinary skill in the art, power is defined as a rate at which energy is generated or consumed. As such, estimates of power dissipation of an electronic device are substantially the same as estimates of power required for that device to operate under the same conditions because virtually all the energy used to operate the electronic device ends up being dissipated. Thus, the terms power dissipation and power requirements are used herein interchangeably.
As is also well known, the power requirements of an electronic device are typically divided into three categories designated as: (a) static power; (b) dynamic power; and (c) peak power. Static power (also known as leakage power) is power that is dissipated as a result of leakage current being produced whenever the device is powered but not operated as intended. As is well known, static power is typically relatively small, and it can readily be estimated using well known prior art methods from “resting” or “idling” conditions and internal data values (for example, a set of signal values that are either known or are determined by simulating a “reset sequence” in accordance with any one of a number of methods that are well known to those of ordinary skill in the art).
Power dissipated whenever the device is operated as intended in various ways is termed dynamic power or dynamic power dissipation. As is well known, as external signals applied to a device change, internal signals in the device may also change dynamically with time, and as a result, energy is dissipated. This energy is the power dissipation over the period of time the device was working. As one can readily appreciate from this, the dynamic power depends on switching activity of the signals in the device, which switching activity depends, in turn, on the application being run on the device, or the conditions under which the device is being used. Typically, the duration of such applications are sufficiently long to warrant (but not necessarily be limited to) a single measure of dynamic power for the device. As is known, to ensure that a device can perform its functions over a long period of time, or indefinitely, estimates of dynamic power should be on the high side, which high side estimates can be termed a worst-case dynamic power of the circuit design. Then, the device should be manufactured to sustain the worst-case dynamic power over a long period of time or indefinitely.
Peak power is the highest power or energy dissipated in a short period of time, which period could be as small as a single operating cycle or several consecutive operating cycles (an operating cycle is basically a clock cycle or a period of time a signal needs to settle after a change of value). As is well known, a clock signal is a signal that changes in a regular pattern over time, and is distributed to various parts of the device. Clock signals are used in electronic and semiconductor devices among other things to synchronize data, and a device may have one or many externally supplied, internally generated, or internally derived clock signals, which are all labeled as clocks herein. As is well known, in circuits, clock signals may operate at different frequencies, and some of them are designed to operate synchronized in time (similar waveforms with respect to time). However, in a simulation environment for a circuit design, it is possible to have clock signals deviate from their intended timing waveform behavior. For example, a derived clock may be expected to operate at half the frequency of its source according to its specifications. However, in the simulation environment, the derived clock could be forced by a stimulus to operate at a different frequency from its specification. Peak power, in addition to static and dynamic power, is a requirement to be considered at the planning, implementation, and utilization stages of a device design to determine voltage supply and current needs of a device and its systems.
Prior art methods used at present for estimating dynamic power have not proved practical in most cases, particularly for use with large devices or circuit designs. In particular, semiconductor circuit designers currently use, for example and without limitation, one of the following methods for estimating dynamic power using computer software programs (for example, Electronic Design Automation tools which also referred to in the art and herein as “EDA Tools”) or simple manual calculations: (a) estimating dynamic power using prior knowledge; (b) estimating dynamic power by performing hand calculations; (c) estimating dynamic power using a simulation of user provided stimulus data; (d) estimating dynamic power using probability-based calculations; and (e) estimating dynamic power using simulation based stimulus generation schemes. All these methods are problematic.
In particular, a method for estimating dynamic power using prior knowledge may be carried out as follows. The power dissipated by an already manufactured circuit design can be measured by a specially designed hardware (tester) while the device is subjected to a typical application. In particular, using various application situations, one can find the worst-case average dynamic power and other requirements of the device. Then, when a new circuit or device is designed which is an enhancement or a derivation of the measured device it is possible to estimate the power requirement of the new design by extrapolating the known data to include changes in device size, area, operation speeds, and so forth. Some problems with this method are a lack of prior knowledge of power dissipated by a previous design, and the difficulty of quantifying the amount of changes the new design has gone through. In essence, this method merely entails guesswork.
A method for estimating dynamic power by performing hand calculations may be carried out as follows. A circuit design typically includes many functional and logical sections or blocks. In fact a new circuit design could even be a collection of several smaller designs. Thus, if the power dissipated by each block were known, these power dissipations could be added up to obtain the total power dissipation of the circuit design. In essence, in accordance with this method, simple calculations may be made manually, and they are presented in a Spread Sheet or in tabulation. Some of the problems with this method are that the power dissipated by some blocks is unknown or is hard to determine using any of the above-listed methods. In addition, power data provided by parties designing different circuit blocks may not be reliable. As a result, this method also becomes guesswork.
A method of estimating dynamic power using a simulation of user provided stimulus data may be carried out as follows. During the course of a circuit design, the circuit design team studies, verifies, and tests the circuit design using simulation methods including data and conditions applied to signals in the circuit design. These data and conditions are known as stimulus data sets (they are sometimes referred to in the art as stimulus vector sets). To estimate dynamic power, a circuit design team may provide a stimulus data set or a stimulus vector set to be applied to the circuit design, which stimulus data set or stimulus vector set corresponds to a typical application of the circuit design. Ideally, the stimulus data set used should cause worst-case average power dissipation conditions, otherwise the final estimate of dynamic power could be too low. Next, the stimulus data set is simulated on the circuit design in accordance with any one of a number of methods that are well known to those of ordinary skill in the art, and all internal signal responses and changes are recorded as signal waveforms or as a signal Value Change Data (“VCD”) file. Next, for example and without limitation, the signal VCD file can be processed to create signal switching activity summaries. In some cases, EDA tools used to carry out the simulation may: (a) consider specific data related to power/energy in Technology Library Cells (such data in Technology Library Cells are sometimes referred to as “Power Arcs” or “Energy Arcs,” and such data introduce conditions to be met by the circuit design for proper performance and to characterize the cells); and (b) collect information related to how many such conditions are met (“satisfied”) during each simulation cycle of the circuit design. Next, such collected signal switching data are applied to a Power Calculation Tool (for example, such a Power Calculation Tool may be any one of a number of such tools that are well known to those of ordinary skill in the art which are commercially available), which Power Calculation Tool provides average power dissipation figures based on the given data set. As is well known, Energy Arcs specify signal transition conditions for Technology Library Cells that, when met or satisfied, would release a specific finite amount of energy. Also, as is also well known, Power Arcs specify signal value conditions for Technology Library Cells that, when met or satisfied, would dissipate a certain amount of power until that condition changes. Thus, a collection of such “satisfied” Energy Arcs during a given simulation cycle releases a predetermined amount of energy, while a collection of such “satisfied” Power Arcs dissipate a predetermined amount of power that is used to calculate the energy dissipated in each simulation cycle. When the total energy released over an entire time period (i.e., a time period covering many simulation cycles during which the stimulus data set is applied to the circuit design) is considered, the circuit designer obtain the power dissipation of the circuit design. One problem with this method occurs in selecting an application-related stimulus data set to provide worst-case power dissipation scenarios. In essence, a circuit designer has no principled method for selecting a stimulus data set that will provide a worst-case average power dissipation scenario without trying several candidate stimulus data sets. The circuit designer may have some knowledge about how a particular stimulus data set affects the circuit design, but there is no way to validate a particular selection without trying several of them, because the overall behavior of a large and complex circuit design is hard to grasp. Another problem with this method is that the size of some designs is so large that it may take an impractically large amount of data and processing time to carry out the method. For example, for large circuit designs, stimulus data sets may have many thousands or even millions of cycles. Hence, simulation run times to produce signal value change data files may be very high, and the data file produced may overwhelm computer resources and/or EDA tools in subsequent steps to reach the final estimates. In addition, since stimulus data is contiguous, they cannot be broken into small sets, and they may have to be applied as a whole.
A method for estimating dynamic power using probability-based calculations may be carried out as follows. In accordance with this method, inputs of a circuit design are considered to have a certain amount of signal switching activity, which signal switching activity is expressed as a probability (for example and without limitation, a probability of having a logic value 1 or 0 as an input signal). These probabilities are propagated into internal signal nodes of the circuit design using simulation and probabilistic techniques in a well-known manner using, for example and without limitation, any algorithmic techniques including computer software programming and programs. The result is a set of switching probability values at external and internal circuit nodes. This value set is then considered to represent average switching activities at signal nodes, normalized (for example and without limitation, to a single simulation cycle) over time. Next, the switching data can be applied to any one of a number other EDA tools that are commercially available to obtain a power dissipation value. One problem with this method is that it uses probabilities as signal switching data, and that is a poor assumption. For example, in order for that assumption to be valid, the circuit design must undergo all combinations of possible signal value changes during its application for that power dissipation calculation to be valid. In addition, circuit designs have many levels of logic gates between external inputs and external outputs, and as switching probabilities are propagated into the circuit nodes, the switching probability of internal signal nodes deep inside the circuit design approaches zero. Therefore, since most large circuit designs are typically deep in logic levels, they will not have realistic switching probabilities at internal signal nodes. As a result, this method basically limits switching activities to areas close to the external boundary of the circuit design, and as a result, the calculated power dissipation may fall short of actual power dissipated by the circuit. Another problem results in using the method with circuits having embedded structures such as memories (RAMs), which dissipate a high level of power for certain operations such as read and write. If such memories were deep inside the circuit design, this method would find them to be almost inactive. However, if such memories were on the boundary of the circuit design, they would dominate the calculated power dissipation to an unacceptable degree, for example, 90% of power dissipation would be calculated as being produced by 2% of the circuit. A similar situation may arise due to circuit areas close to an external boundary providing most of the contribution to the final estimate, thus making results not meaningful.
A method for estimating dynamic power using simulation based stimulus generation schemes may be carried out as follows. The main idea in these stimulus generation schemes is to: (a) externally create a large number of stimuli data sets rapidly; (b) evaluate them; and (c) retain few of them. A stimulus data set can be generated in any well-known manner using, for example and without limitation, any algorithmic techniques using computer software. For example, a stimulus data set can be generated by: (a) using a random number generator; (b) applying Genetic Algorithmic techniques to external signal pins or to internal signal nodes that may be taken to be representative of the circuit state; or (c) a combination of (a) and (b). Next, each stimulus data set is simulated on the circuit design while a predetermined set of parameters are evaluated for each stimulus data set for each simulation cycle to decide whether to retain that stimulus data set or to generate another stimulus data set. For example, the parameters evaluated for each simulation cycle may be how fast the signals toggled, or how many Energy Arcs were satisfied. In addition, a simulation may also provide switching activities at external and internal circuit nodes. After applying a number of stimulus data sets, a set of switching activity data (sometimes referred to as a value set) has been collected which is considered to represent average switching activities at signal nodes. Next, the collected set of switching activity data is applied to any one of a number of other EDA tools that are commercially available to obtain a power dissipation value. Alternatively, the stimulus data sets that were retained can be applied to a simulation as if the circuit designer has supplied them to generate “VCD data file” as explained above in conjunction with the method estimating dynamic power using a simulation of user provided stimulus data. Each of these non-deterministic stimulus generation schemes exhibits the same weaknesses that were described above with respect to the probabilistic methods, namely, as data values propagate deeper in to the circuit design, the switching activity it would produce diminishes rapidly.
In light of the above, there is a need for methods for estimating the power requirements of a circuit design that solve or overcome one or more of the above-identified problems.